(1) Avoid arranging important signal lines, such as clock and reset signals, on the edge of the PCB.
(2) The distance between the chassis ground wire and the signal wire is at least 4 mm; keep the aspect ratio of the chassis ground wire less than 5:1 to reduce the inductance effect.
(3) Use the LOCK function to lock the devices and lines whose positions have been determined so that they will not be mishandled in the future.
(4) The minimum width of the wire should not be less than 0.2mm (8mil). In high-density and high-precision printed circuits, the width and spacing of the wires are generally 12mil.
(5) The 10-10 and 12-12 principles can be applied between the IC pins of the DIP package, that is, when two lines pass between the two pins, the diameter of the pad can be set to 50mil, and the line width and line spacing are both 10mil, when only one line passes between the two feet, the pad diameter can be set to 64mil, and the line width and line spacing are both 12mil.
(6) When the diameter of the pad is 1.5mm, in order to increase the peel strength of the pad, a length of not less than 1.5mm, a width of 1.5mm and an oval pad can be used.
(7) In the design, when the traces connected to the pads are thin, the connection between the pads and the traces should be designed into a water drop shape, so that the pads are not easy to peel, and the traces and the pads are not easy to disconnect.
(8) In the design of large-area copper application, there should be an opening window on the copper application, and heat dissipation holes should be added, and the opening window should be designed into a mesh.
(9) Shorten the connection between high-frequency components as much as possible to reduce their distribution parameters and mutual electromagnetic interference. Components that are susceptible to interference should not be too close to each other, and input and output components should be kept as far apart as possible.